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NXP Semiconductors /QN908XC /DMA0 /INTENSET0

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Interpret as INTENSET0

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0INTEN

Description

Interrupt Enable read and Set for all DMA channels.

Fields

INTEN

Interrupt Enable read and set for DMA channel n. Bit n corresponds to DMA channel n. The number of bits = number of DMA channels in this device. Other bits are reserved. 0 = interrupt for DMA channel is disabled. 1 = interrupt for DMA channel is enabled.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data